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-rw-r--r--host/lib/usrp/b100/clock_ctrl.cpp4
-rw-r--r--host/lib/usrp/b200/b200_iface.cpp2
-rw-r--r--host/lib/usrp/b200/b200_impl.cpp4
-rw-r--r--host/lib/usrp/common/adf435x_common.cpp4
-rw-r--r--host/lib/usrp/common/fifo_ctrl_excelsior.cpp8
-rw-r--r--host/lib/usrp/common/fx2_ctrl.cpp2
-rw-r--r--host/lib/usrp/cores/i2c_core_100_wb32.cpp4
-rw-r--r--host/lib/usrp/cores/radio_ctrl_core_3000.cpp2
-rw-r--r--host/lib/usrp/dboard/db_tvrx2.cpp14
-rw-r--r--host/lib/usrp/dboard/db_ubx.cpp2
-rw-r--r--host/lib/usrp/e300/e300_common.cpp2
-rw-r--r--host/lib/usrp/e300/e300_impl.cpp8
-rw-r--r--host/lib/usrp/e300/e300_sensor_manager.cpp6
-rw-r--r--host/lib/usrp/usrp1/usrp1_iface.cpp8
-rw-r--r--host/lib/usrp/usrp2/usrp2_fifo_ctrl.cpp8
-rw-r--r--host/lib/usrp/usrp2/usrp2_iface.cpp12
-rw-r--r--host/lib/usrp/x300/x300_impl.cpp4
17 files changed, 47 insertions, 47 deletions
diff --git a/host/lib/usrp/b100/clock_ctrl.cpp b/host/lib/usrp/b100/clock_ctrl.cpp
index febc8ba4b..53a35df2b 100644
--- a/host/lib/usrp/b100/clock_ctrl.cpp
+++ b/host/lib/usrp/b100/clock_ctrl.cpp
@@ -114,8 +114,8 @@ static clock_settings_type get_clock_settings(double rate){
const size_t gcd = size_t(boost::math::gcd(ref_rate, out_rate));
for (size_t i = 1; i <= 100; i++){
- const size_t X = i*ref_rate/gcd;
- const size_t Y = i*out_rate/gcd;
+ const size_t X = size_t(i*ref_rate/gcd);
+ const size_t Y = size_t(i*out_rate/gcd);
//determine A and B (P is fixed)
cs.b_counter = Y/cs.prescaler;
diff --git a/host/lib/usrp/b200/b200_iface.cpp b/host/lib/usrp/b200/b200_iface.cpp
index 0f799e571..270d3bb4b 100644
--- a/host/lib/usrp/b200/b200_iface.cpp
+++ b/host/lib/usrp/b200/b200_iface.cpp
@@ -549,7 +549,7 @@ public:
size_t file_size = 0;
{
std::ifstream file(filename, std::ios::in | std::ios::binary | std::ios::ate);
- file_size = file.tellg();
+ file_size = size_t(file.tellg());
}
std::ifstream file;
diff --git a/host/lib/usrp/b200/b200_impl.cpp b/host/lib/usrp/b200/b200_impl.cpp
index 81bbb6691..e1b106208 100644
--- a/host/lib/usrp/b200/b200_impl.cpp
+++ b/host/lib/usrp/b200/b200_impl.cpp
@@ -786,7 +786,7 @@ void b200_impl::register_loopback_self_test(wb_iface::sptr iface)
{
bool test_fail = false;
UHD_MSG(status) << "Performing register loopback test... " << std::flush;
- size_t hash = time(NULL);
+ size_t hash = size_t(time(NULL));
for (size_t i = 0; i < 100; i++)
{
boost::hash_combine(hash, i);
@@ -1131,6 +1131,6 @@ sensor_value_t b200_impl::get_ref_locked(void)
sensor_value_t b200_impl::get_fe_pll_locked(const bool is_tx)
{
const boost::uint32_t st = _local_ctrl->peek32(RB32_CORE_PLL);
- const bool locked = is_tx ? bool(st & 0x1) : bool(st & 0x2);
+ const bool locked = is_tx ? ((st & 0x1) > 0) : ((st & 0x2) > 0);
return sensor_value_t("LO", locked, "locked", "unlocked");
}
diff --git a/host/lib/usrp/common/adf435x_common.cpp b/host/lib/usrp/common/adf435x_common.cpp
index 9b362a4d9..474a1c932 100644
--- a/host/lib/usrp/common/adf435x_common.cpp
+++ b/host/lib/usrp/common/adf435x_common.cpp
@@ -129,11 +129,11 @@ adf435x_tuning_settings tune_adf435x_synth(
settings.frac_12_bit = FRAC;
settings.int_16_bit = N;
settings.mod_12_bit = MOD;
- settings.clock_divider_12_bit = std::max<boost::uint16_t>(1, std::ceil(PHASE_RESYNC_TIME*pfd_freq/MOD));
+ settings.clock_divider_12_bit = std::max<boost::uint16_t>(1, boost::uint16_t(std::ceil(PHASE_RESYNC_TIME*pfd_freq/MOD)));
settings.r_counter_10_bit = R;
settings.r_divide_by_2_en = T;
settings.r_doubler_en = D;
- settings.band_select_clock_div = BS;
+ settings.band_select_clock_div = boost::uint8_t(BS);
settings.rf_divider = RFdiv;
std::string tuning_str = (constraints.force_frac0) ? "Integer-N" : "Fractional";
diff --git a/host/lib/usrp/common/fifo_ctrl_excelsior.cpp b/host/lib/usrp/common/fifo_ctrl_excelsior.cpp
index c0e2c5ea0..2ea5b66da 100644
--- a/host/lib/usrp/common/fifo_ctrl_excelsior.cpp
+++ b/host/lib/usrp/common/fifo_ctrl_excelsior.cpp
@@ -119,7 +119,7 @@ public:
/*******************************************************************
* Peek and poke 32 bit implementation
******************************************************************/
- void poke32(wb_addr_type addr, boost::uint32_t data){
+ void poke32(const wb_addr_type addr, const boost::uint32_t data){
boost::mutex::scoped_lock lock(_mutex);
this->send_pkt(addr, data, POKE32_CMD);
@@ -127,7 +127,7 @@ public:
this->wait_for_ack(_seq_out-MAX_SEQS_OUT);
}
- boost::uint32_t peek32(wb_addr_type addr){
+ boost::uint32_t peek32(const wb_addr_type addr){
boost::mutex::scoped_lock lock(_mutex);
this->send_pkt(addr, 0, PEEK32_CMD);
@@ -138,11 +138,11 @@ public:
/*******************************************************************
* Peek and poke 16 bit not implemented
******************************************************************/
- void poke16(wb_addr_type, boost::uint16_t){
+ void poke16(const wb_addr_type, const boost::uint16_t){
throw uhd::not_implemented_error("poke16 not implemented in fifo ctrl module");
}
- boost::uint16_t peek16(wb_addr_type){
+ boost::uint16_t peek16(const wb_addr_type){
throw uhd::not_implemented_error("peek16 not implemented in fifo ctrl module");
}
diff --git a/host/lib/usrp/common/fx2_ctrl.cpp b/host/lib/usrp/common/fx2_ctrl.cpp
index 6552f1b2d..7ae97e4d0 100644
--- a/host/lib/usrp/common/fx2_ctrl.cpp
+++ b/host/lib/usrp/common/fx2_ctrl.cpp
@@ -421,7 +421,7 @@ public:
boost::uint16_t offset,
size_t num_bytes
){
- this->write_i2c(addr, byte_vector_t(1, offset));
+ this->write_i2c(addr, byte_vector_t(1, boost::uint8_t(offset)));
return this->read_i2c(addr, num_bytes);
}
diff --git a/host/lib/usrp/cores/i2c_core_100_wb32.cpp b/host/lib/usrp/cores/i2c_core_100_wb32.cpp
index a85cdea42..530267f6c 100644
--- a/host/lib/usrp/cores/i2c_core_100_wb32.cpp
+++ b/host/lib/usrp/cores/i2c_core_100_wb32.cpp
@@ -70,7 +70,7 @@ public:
void set_clock_rate(const double rate)
{
static const boost::uint32_t i2c_datarate = 400000;
- boost::uint16_t prescaler = rate / (i2c_datarate*5) - 1;
+ boost::uint16_t prescaler = boost::uint16_t(rate / (i2c_datarate*5) - 1);
_iface->poke32(REG_I2C_PRESCALER_LO, prescaler & 0xFF);
_iface->poke32(REG_I2C_PRESCALER_HI, (prescaler >> 8) & 0xFF);
}
@@ -127,7 +127,7 @@ public:
//the default implementation calls read i2c once per byte
byte_vector_t read_eeprom(boost::uint16_t addr, boost::uint16_t offset, size_t num_bytes)
{
- this->write_i2c(addr, byte_vector_t(1, offset));
+ this->write_i2c(addr, byte_vector_t(1, boost::uint8_t(offset)));
return this->read_i2c(addr, num_bytes);
}
diff --git a/host/lib/usrp/cores/radio_ctrl_core_3000.cpp b/host/lib/usrp/cores/radio_ctrl_core_3000.cpp
index 6357102fb..1c9b5c4fa 100644
--- a/host/lib/usrp/cores/radio_ctrl_core_3000.cpp
+++ b/host/lib/usrp/cores/radio_ctrl_core_3000.cpp
@@ -190,7 +190,7 @@ private:
try
{
UHD_ASSERT_THROW(bool(buff));
- UHD_ASSERT_THROW(bool(buff->size()));
+ UHD_ASSERT_THROW(buff->size() > 0);
}
catch(const std::exception &ex)
{
diff --git a/host/lib/usrp/dboard/db_tvrx2.cpp b/host/lib/usrp/dboard/db_tvrx2.cpp
index c74c64471..9300483d1 100644
--- a/host/lib/usrp/dboard/db_tvrx2.cpp
+++ b/host/lib/usrp/dboard/db_tvrx2.cpp
@@ -1103,7 +1103,7 @@ tvrx2::~tvrx2(void){
* TDA18272 Register IO Functions
**********************************************************************/
void tvrx2::set_scaled_rf_freq(double rf_freq){
- _tda18272hnm_regs.set_rf_freq(_freq_scalar*rf_freq/1e3);
+ _tda18272hnm_regs.set_rf_freq(boost::uint32_t(_freq_scalar*rf_freq/1e3));
}
double tvrx2::get_scaled_rf_freq(void){
@@ -1320,9 +1320,9 @@ void tvrx2::tvrx2_tda18272_tune_rf_filter(boost::uint32_t uRF)
read_reg(0x26, 0x2B);
subband_freqs = get_tda18272_rfcal_result_freq_range(1);
- uRFCal0 = subband_freqs.start();
+ uRFCal0 = boost::uint32_t(subband_freqs.start());
subband_freqs = get_tda18272_rfcal_result_freq_range(4);
- uRFCal1 = subband_freqs.start();
+ uRFCal1 = boost::uint32_t(subband_freqs.start());
if(uRF < uRFCal0)
subband = 0;
@@ -1335,9 +1335,9 @@ void tvrx2::tvrx2_tda18272_tune_rf_filter(boost::uint32_t uRF)
else
{
subband_freqs = get_tda18272_rfcal_result_freq_range(7);
- uRFCal0 = subband_freqs.start();
+ uRFCal0 = boost::uint32_t(subband_freqs.start());
subband_freqs = get_tda18272_rfcal_result_freq_range(10);
- uRFCal1 = subband_freqs.start();
+ uRFCal1 = boost::uint32_t(subband_freqs.start());
if(uRF < uRFCal0)
subband = 4;
@@ -1351,7 +1351,7 @@ void tvrx2::tvrx2_tda18272_tune_rf_filter(boost::uint32_t uRF)
cal_result = _rfcal_coeffs[subband].cal_number;
subband_freqs = get_tda18272_rfcal_result_freq_range(cal_result);
- uRFCal0 = subband_freqs.start();
+ uRFCal0 = boost::uint32_t(subband_freqs.start());
RF_A1 = _rfcal_coeffs[subband].RF_A1;
RF_B1 = _rfcal_coeffs[subband].RF_B1;
@@ -1721,7 +1721,7 @@ void tvrx2::wait_irq(void){
send_reg(0xA, 0xA);
read_reg(0xA, 0xB);
- irq = (this->get_iface()->read_gpio(dboard_iface::UNIT_RX) & tvrx2_sd_name_to_irq_io[get_subdev_name()]);
+ irq = (this->get_iface()->read_gpio(dboard_iface::UNIT_RX) & tvrx2_sd_name_to_irq_io[get_subdev_name()]) > 0;
UHD_LOGV(often) << boost::format(
"\nTVRX2 (%s): Cleared IRQ, subdev = %d, mask = 0x%x, Status: 0x%x\n") % (get_subdev_name()) % get_subdev_name() % (int(tvrx2_sd_name_to_irq_io[get_subdev_name()])) % irq << std::endl;
diff --git a/host/lib/usrp/dboard/db_ubx.cpp b/host/lib/usrp/dboard/db_ubx.cpp
index 5184d2ecb..06bfad7d3 100644
--- a/host/lib/usrp/dboard/db_ubx.cpp
+++ b/host/lib/usrp/dboard/db_ubx.cpp
@@ -191,7 +191,7 @@ protected:
}
//keep pfd freq low enough to achieve 50kHz BS clock
- BS = std::ceil(pfd_freq / 50e3);
+ BS = int(std::ceil(pfd_freq / 50e3));
if(BS <= 1023) break;
}
UHD_ASSERT_THROW(R <= 1023);
diff --git a/host/lib/usrp/e300/e300_common.cpp b/host/lib/usrp/e300/e300_common.cpp
index 97e906be7..db5b37055 100644
--- a/host/lib/usrp/e300/e300_common.cpp
+++ b/host/lib/usrp/e300/e300_common.cpp
@@ -45,7 +45,7 @@ void load_fpga_image(const std::string &path)
char buff[16384]; // devcfg driver can't handle huge writes
do {
fpga_file.read(buff, sizeof(buff));
- std::fwrite(buff, 1, fpga_file.gcount(), wfile);
+ std::fwrite(buff, 1, size_t(fpga_file.gcount()), wfile);
} while (fpga_file);
fpga_file.close();
diff --git a/host/lib/usrp/e300/e300_impl.cpp b/host/lib/usrp/e300/e300_impl.cpp
index 40904bda7..3d92bc5c8 100644
--- a/host/lib/usrp/e300/e300_impl.cpp
+++ b/host/lib/usrp/e300/e300_impl.cpp
@@ -361,7 +361,7 @@ e300_impl::e300_impl(const uhd::device_addr_t &device_addr)
e300_fifo_config_t fifo_cfg;
try {
fifo_cfg = e300_read_sysfs();
- } catch (uhd::lookup_error &e) {
+ } catch (...) {
throw uhd::runtime_error("Failed to get driver parameters from sysfs.");
}
_fifo_iface = e300_fifo_interface::make(fifo_cfg);
@@ -610,7 +610,7 @@ uhd::sensor_value_t e300_impl::_get_fe_pll_lock(const bool is_tx)
{
const boost::uint32_t st =
_global_regs->peek32(global_regs::RB32_CORE_PLL);
- const bool locked = is_tx ? st & 0x1 : st & 0x2;
+ const bool locked = is_tx ? ((st & 0x1) > 0) : ((st & 0x2) > 0);
return sensor_value_t("LO", locked, "locked", "unlocked");
}
@@ -665,7 +665,7 @@ void e300_impl::_register_loopback_self_test(wb_iface::sptr iface)
{
bool test_fail = false;
UHD_MSG(status) << "Performing register loopback test... " << std::flush;
- size_t hash = time(NULL);
+ size_t hash = size_t(time(NULL));
for (size_t i = 0; i < 100; i++)
{
boost::hash_combine(hash, i);
@@ -705,7 +705,7 @@ void e300_impl::_codec_loopback_self_test(wb_iface::sptr iface)
bool test_fail = false;
UHD_ASSERT_THROW(bool(iface));
UHD_MSG(status) << "Performing CODEC loopback test... " << std::flush;
- size_t hash = time(NULL);
+ size_t hash = size_t(time(NULL));
for (size_t i = 0; i < 100; i++)
{
boost::hash_combine(hash, i);
diff --git a/host/lib/usrp/e300/e300_sensor_manager.cpp b/host/lib/usrp/e300/e300_sensor_manager.cpp
index 95f31742b..527cfb91a 100644
--- a/host/lib/usrp/e300/e300_sensor_manager.cpp
+++ b/host/lib/usrp/e300/e300_sensor_manager.cpp
@@ -159,7 +159,7 @@ public:
}
UHD_ASSERT_THROW(uhd::ntohx<boost::uint32_t>(transaction.which) == GPS_FOUND);
// TODO: Use proper serialization here ...
- return static_cast<bool>(uhd::ntohx(transaction.value));
+ return (uhd::ntohx(transaction.value) > 0);
}
uhd::sensor_value_t get_gps_lock(void)
@@ -193,7 +193,7 @@ public:
}
UHD_ASSERT_THROW(uhd::ntohx<boost::uint32_t>(transaction.which) == GPS_LOCK);
// TODO: Use proper serialization here ...
- return sensor_value_t("GPS lock status", static_cast<bool>(uhd::ntohx(transaction.value)), "locked", "unlocked");
+ return sensor_value_t("GPS lock status", (uhd::ntohx(transaction.value) > 0), "locked", "unlocked");
}
uhd::sensor_value_t get_ref_lock(void)
@@ -227,7 +227,7 @@ public:
}
UHD_ASSERT_THROW(uhd::ntohx<boost::uint32_t>(transaction.which) == REF_LOCK);
// TODO: Use proper serialization here ...
- return sensor_value_t("Ref", static_cast<bool>(uhd::ntohx(transaction.value)), "locked", "unlocked");
+ return sensor_value_t("Ref", (uhd::ntohx(transaction.value) > 0), "locked", "unlocked");
}
private:
diff --git a/host/lib/usrp/usrp1/usrp1_iface.cpp b/host/lib/usrp/usrp1/usrp1_iface.cpp
index 6eff9d3ad..48fdfcf12 100644
--- a/host/lib/usrp/usrp1/usrp1_iface.cpp
+++ b/host/lib/usrp/usrp1/usrp1_iface.cpp
@@ -45,7 +45,7 @@ public:
/*******************************************************************
* Peek and Poke
******************************************************************/
- void poke32(boost::uint32_t addr, boost::uint32_t value)
+ void poke32(const boost::uint32_t addr, const boost::uint32_t value)
{
boost::uint32_t swapped = uhd::htonx(value);
@@ -68,7 +68,7 @@ public:
if (ret < 0) throw uhd::io_error("USRP1: failed control write");
}
- boost::uint32_t peek32(boost::uint32_t addr)
+ boost::uint32_t peek32(const boost::uint32_t addr)
{
UHD_LOGV(always)
<< "peek32("
@@ -92,11 +92,11 @@ public:
return uhd::ntohx(value_out);
}
- void poke16(boost::uint32_t, boost::uint16_t) {
+ void poke16(const boost::uint32_t, const boost::uint16_t) {
throw uhd::not_implemented_error("Unhandled command poke16()");
}
- boost::uint16_t peek16(boost::uint32_t) {
+ boost::uint16_t peek16(const boost::uint32_t) {
throw uhd::not_implemented_error("Unhandled command peek16()");
return 0;
}
diff --git a/host/lib/usrp/usrp2/usrp2_fifo_ctrl.cpp b/host/lib/usrp/usrp2/usrp2_fifo_ctrl.cpp
index efb88eb82..9e8687b94 100644
--- a/host/lib/usrp/usrp2/usrp2_fifo_ctrl.cpp
+++ b/host/lib/usrp/usrp2/usrp2_fifo_ctrl.cpp
@@ -67,7 +67,7 @@ public:
/*******************************************************************
* Peek and poke 32 bit implementation
******************************************************************/
- void poke32(wb_addr_type addr, boost::uint32_t data){
+ void poke32(const wb_addr_type addr, const boost::uint32_t data){
boost::mutex::scoped_lock lock(_mutex);
this->send_pkt((addr - SETTING_REGS_BASE)/4, data, POKE32_CMD);
@@ -75,7 +75,7 @@ public:
this->wait_for_ack(_seq_out-MAX_SEQS_OUT);
}
- boost::uint32_t peek32(wb_addr_type addr){
+ boost::uint32_t peek32(const wb_addr_type addr){
boost::mutex::scoped_lock lock(_mutex);
this->send_pkt((addr - READBACK_BASE)/4, 0, PEEK32_CMD);
@@ -86,11 +86,11 @@ public:
/*******************************************************************
* Peek and poke 16 bit not implemented
******************************************************************/
- void poke16(wb_addr_type, boost::uint16_t){
+ void poke16(const wb_addr_type, const boost::uint16_t){
throw uhd::not_implemented_error("poke16 not implemented in fifo ctrl module");
}
- boost::uint16_t peek16(wb_addr_type){
+ boost::uint16_t peek16(const wb_addr_type){
throw uhd::not_implemented_error("peek16 not implemented in fifo ctrl module");
}
diff --git a/host/lib/usrp/usrp2/usrp2_iface.cpp b/host/lib/usrp/usrp2/usrp2_iface.cpp
index 2f2c345be..3ffbf9aac 100644
--- a/host/lib/usrp/usrp2/usrp2_iface.cpp
+++ b/host/lib/usrp/usrp2/usrp2_iface.cpp
@@ -139,19 +139,19 @@ public:
/***********************************************************************
* Peek and Poke
**********************************************************************/
- void poke32(wb_addr_type addr, boost::uint32_t data){
+ void poke32(const wb_addr_type addr, const boost::uint32_t data){
this->get_reg<boost::uint32_t, USRP2_REG_ACTION_FPGA_POKE32>(addr, data);
}
- boost::uint32_t peek32(wb_addr_type addr){
+ boost::uint32_t peek32(const wb_addr_type addr){
return this->get_reg<boost::uint32_t, USRP2_REG_ACTION_FPGA_PEEK32>(addr);
}
- void poke16(wb_addr_type addr, boost::uint16_t data){
+ void poke16(const wb_addr_type addr, const boost::uint16_t data){
this->get_reg<boost::uint16_t, USRP2_REG_ACTION_FPGA_POKE16>(addr, data);
}
- boost::uint16_t peek16(wb_addr_type addr){
+ boost::uint16_t peek16(const wb_addr_type addr){
return this->get_reg<boost::uint16_t, USRP2_REG_ACTION_FPGA_PEEK16>(addr);
}
@@ -219,7 +219,7 @@ public:
//setup the out data
usrp2_ctrl_data_t out_data = usrp2_ctrl_data_t();
out_data.id = htonl(USRP2_CTRL_ID_WRITE_THESE_I2C_VALUES_BRO);
- out_data.data.i2c_args.addr = addr;
+ out_data.data.i2c_args.addr = uint8_t(addr);
out_data.data.i2c_args.bytes = buf.size();
//limitation of i2c transaction size
@@ -237,7 +237,7 @@ public:
//setup the out data
usrp2_ctrl_data_t out_data = usrp2_ctrl_data_t();
out_data.id = htonl(USRP2_CTRL_ID_DO_AN_I2C_READ_FOR_ME_BRO);
- out_data.data.i2c_args.addr = addr;
+ out_data.data.i2c_args.addr = uint8_t(addr);
out_data.data.i2c_args.bytes = num_bytes;
//limitation of i2c transaction size
diff --git a/host/lib/usrp/x300/x300_impl.cpp b/host/lib/usrp/x300/x300_impl.cpp
index d9b27b6b4..641adc048 100644
--- a/host/lib/usrp/x300/x300_impl.cpp
+++ b/host/lib/usrp/x300/x300_impl.cpp
@@ -1306,7 +1306,7 @@ void x300_impl::register_loopback_self_test(wb_iface::sptr iface)
{
bool test_fail = false;
UHD_MSG(status) << "Performing register loopback test... " << std::flush;
- size_t hash = time(NULL);
+ size_t hash = size_t(time(NULL));
for (size_t i = 0; i < 100; i++)
{
boost::hash_combine(hash, i);
@@ -1561,7 +1561,7 @@ void x300_impl::claimer_loop(wb_iface::sptr iface)
{
{ //Critical section
boost::mutex::scoped_lock(claimer_mutex);
- iface->poke32(SR_ADDR(X300_FW_SHMEM_BASE, X300_FW_SHMEM_CLAIM_TIME), time(NULL));
+ iface->poke32(SR_ADDR(X300_FW_SHMEM_BASE, X300_FW_SHMEM_CLAIM_TIME), uint32_t(time(NULL)));
iface->poke32(SR_ADDR(X300_FW_SHMEM_BASE, X300_FW_SHMEM_CLAIM_SRC), get_process_hash());
}
boost::this_thread::sleep(boost::posix_time::milliseconds(1000)); //1 second
generated by cgit v1.2.3 (git 2.46.0) at 2025-10-31 15:55:46 +0000