diff options
Diffstat (limited to 'host/include')
| -rw-r--r-- | host/include/uhd/CMakeLists.txt | 3 | ||||
| -rw-r--r-- | host/include/uhd/erfnoc/CMakeLists.txt | 8 | ||||
| -rw-r--r-- | host/include/uhd/erfnoc/blocks/CMakeLists.txt | 14 | ||||
| -rw-r--r-- | host/include/uhd/erfnoc/blocks/ddc_1x64.yml | 59 | ||||
| -rw-r--r-- | host/include/uhd/erfnoc/blocks/ddc_2x64.yml | 75 | ||||
| -rw-r--r-- | host/include/uhd/erfnoc/blocks/duc_1x64.yml | 59 | ||||
| -rw-r--r-- | host/include/uhd/erfnoc/blocks/duc_2x64.yml | 75 | ||||
| -rw-r--r-- | host/include/uhd/erfnoc/blocks/null_src_sink.yml | 68 | ||||
| -rw-r--r-- | host/include/uhd/erfnoc/blocks/radio_1x64.yml | 72 | ||||
| -rw-r--r-- | host/include/uhd/erfnoc/blocks/radio_2x64.yml | 88 | ||||
| -rw-r--r-- | host/include/uhd/erfnoc/core/CMakeLists.txt | 20 | ||||
| -rw-r--r-- | host/include/uhd/erfnoc/core/io_signatures.yml | 57 | ||||
| -rw-r--r-- | host/include/uhd/erfnoc/core/rfnoc_imagebuilder_args.json | 78 | ||||
| -rw-r--r-- | host/include/uhd/erfnoc/core/x310_bsp.yml | 45 |
14 files changed, 721 insertions, 0 deletions
diff --git a/host/include/uhd/CMakeLists.txt b/host/include/uhd/CMakeLists.txt index cdee1c921..95770038e 100644 --- a/host/include/uhd/CMakeLists.txt +++ b/host/include/uhd/CMakeLists.txt @@ -5,6 +5,9 @@ # SPDX-License-Identifier: GPL-3.0-or-later # +# This is a temporary include - remove once rfnoc is replaced by erfnoc +add_subdirectory(erfnoc) + add_subdirectory(rfnoc) add_subdirectory(transport) add_subdirectory(types) diff --git a/host/include/uhd/erfnoc/CMakeLists.txt b/host/include/uhd/erfnoc/CMakeLists.txt new file mode 100644 index 000000000..e4eddaea2 --- /dev/null +++ b/host/include/uhd/erfnoc/CMakeLists.txt @@ -0,0 +1,8 @@ +# +# Copyright 2019 Ettus Research, a National Instruments Company +# +# SPDX-License-Identifier: GPL-3.0-or-later +# + +add_subdirectory(blocks) +add_subdirectory(core)
\ No newline at end of file diff --git a/host/include/uhd/erfnoc/blocks/CMakeLists.txt b/host/include/uhd/erfnoc/blocks/CMakeLists.txt new file mode 100644 index 000000000..c4b8e678d --- /dev/null +++ b/host/include/uhd/erfnoc/blocks/CMakeLists.txt @@ -0,0 +1,14 @@ +# +# Copyright 2019 Ettus Research, a National Instruments Company +# +# SPDX-License-Identifier: GPL-3.0-or-later +# + +file(GLOB yml_files "*.yml") + +# We always need this, even when RFNoC is 'disabled' +UHD_INSTALL( + FILES ${yml_files} + DESTINATION ${PKG_DATA_DIR}/erfnoc/blocks + COMPONENT headers # TODO: Different component +)
\ No newline at end of file diff --git a/host/include/uhd/erfnoc/blocks/ddc_1x64.yml b/host/include/uhd/erfnoc/blocks/ddc_1x64.yml new file mode 100644 index 000000000..3d21ea527 --- /dev/null +++ b/host/include/uhd/erfnoc/blocks/ddc_1x64.yml @@ -0,0 +1,59 @@ +schema: rfnoc_modtool_args +module_name: ddc +version: 1.0 +rfnoc_version: 1.0 +chdr_width: 64 +noc_id: 0xDDC00000 + +clocks: + - name: rfnoc_chdr + freq: "[]" + - name: rfnoc_ctrl + freq: "[]" + - name: ddc + freq: "[]" + +control: + sw_iface: nocscript + fpga_iface: ctrlport + interface_direction: master_slave + fifo_depth: 32 + clk_domain: ddc + ctrlport: + byte_mode: True + timed: False + has_status: False + +parameters: + NUM_PORTS: 1 + NUM_HB: 3 + CIC_MAX_DECIM: 255 + +data: + fpga_iface: axis_chdr + clk_domain: ddc + mtu: 1024 + inputs: + port0: + index: 0 + item_width: 32 + nipc: 2 + context_fifo_depth: 1 + payload_fifo_depth: 1 + format: int32 + mdata_sig: ~ + outputs: + port0: + index: 0 + item_width: 32 + nipc: 2 + context_fifo_depth: 1 + payload_fifo_depth: 1 + format: int32 + mdata_sig: ~ + +io_port: + +registers: + +properties: diff --git a/host/include/uhd/erfnoc/blocks/ddc_2x64.yml b/host/include/uhd/erfnoc/blocks/ddc_2x64.yml new file mode 100644 index 000000000..a79a07c8f --- /dev/null +++ b/host/include/uhd/erfnoc/blocks/ddc_2x64.yml @@ -0,0 +1,75 @@ +schema: rfnoc_modtool_args +module_name: ddc +version: 1.0 +rfnoc_version: 1.0 +chdr_width: 64 +noc_id: 0xDDC00000 + +clocks: + - name: rfnoc_chdr + freq: "[]" + - name: rfnoc_ctrl + freq: "[]" + - name: ddc + freq: "[]" + +control: + sw_iface: nocscript + fpga_iface: ctrlport + interface_direction: master_slave + fifo_depth: 32 + clk_domain: ddc + ctrlport: + byte_mode: True + timed: False + has_status: False + +parameters: + NUM_PORTS: 2 + NUM_HB: 3 + CIC_MAX_DECIM: 255 + +data: + fpga_iface: axis_chdr + clk_domain: ddc + mtu: 1024 + inputs: + port0: + index: 0 + item_width: 32 + nipc: 2 + context_fifo_depth: 1 + payload_fifo_depth: 1 + format: int32 + mdata_sig: ~ + port1: + index: 1 + item_width: 32 + nipc: 2 + context_fifo_depth: 1 + payload_fifo_depth: 1 + format: int32 + mdata_sig: ~ + outputs: + port0: + index: 0 + item_width: 32 + nipc: 2 + context_fifo_depth: 1 + payload_fifo_depth: 1 + format: int32 + mdata_sig: ~ + port1: + index: 1 + item_width: 32 + nipc: 2 + context_fifo_depth: 1 + payload_fifo_depth: 1 + format: int32 + mdata_sig: ~ + +io_port: + +registers: + +properties: diff --git a/host/include/uhd/erfnoc/blocks/duc_1x64.yml b/host/include/uhd/erfnoc/blocks/duc_1x64.yml new file mode 100644 index 000000000..515f426f2 --- /dev/null +++ b/host/include/uhd/erfnoc/blocks/duc_1x64.yml @@ -0,0 +1,59 @@ +schema: rfnoc_modtool_args +module_name: duc +version: 1.0 +rfnoc_version: 1.0 +chdr_width: 64 +noc_id: 0xD0C00000 + +clocks: + - name: rfnoc_chdr + freq: "[]" + - name: rfnoc_ctrl + freq: "[]" + - name: duc + freq: "[]" + +control: + sw_iface: nocscript + fpga_iface: ctrlport + interface_direction: master_slave + fifo_depth: 32 + clk_domain: duc + ctrlport: + byte_mode: True + timed: False + has_status: False + +parameters: + NUM_PORTS: 1 + NUM_HB: 3 + CIC_MAX_INTERP: 255 + +data: + fpga_iface: axis_chdr + clk_domain: duc + mtu: 1024 + inputs: + port0: + index: 0 + item_width: 32 + nipc: 2 + context_fifo_depth: 1 + payload_fifo_depth: 1 + format: int32 + mdata_sig: ~ + outputs: + port0: + index: 0 + item_width: 32 + nipc: 2 + context_fifo_depth: 1 + payload_fifo_depth: 1 + format: int32 + mdata_sig: ~ + +io_port: + +registers: + +properties: diff --git a/host/include/uhd/erfnoc/blocks/duc_2x64.yml b/host/include/uhd/erfnoc/blocks/duc_2x64.yml new file mode 100644 index 000000000..fd8add930 --- /dev/null +++ b/host/include/uhd/erfnoc/blocks/duc_2x64.yml @@ -0,0 +1,75 @@ +schema: rfnoc_modtool_args +module_name: duc +version: 1.0 +rfnoc_version: 1.0 +chdr_width: 64 +noc_id: 0xD0C00000 + +clocks: + - name: rfnoc_chdr + freq: "[]" + - name: rfnoc_ctrl + freq: "[]" + - name: duc + freq: "[]" + +control: + sw_iface: nocscript + fpga_iface: ctrlport + interface_direction: master_slave + fifo_depth: 32 + clk_domain: duc + ctrlport: + byte_mode: True + timed: False + has_status: False + +parameters: + NUM_PORTS: 2 + NUM_HB: 3 + CIC_MAX_INTERP: 255 + +data: + fpga_iface: axis_chdr + clk_domain: duc + mtu: 1024 + inputs: + port0: + index: 0 + item_width: 32 + nipc: 2 + context_fifo_depth: 1 + payload_fifo_depth: 1 + format: int32 + mdata_sig: ~ + port1: + index: 1 + item_width: 32 + nipc: 2 + context_fifo_depth: 1 + payload_fifo_depth: 1 + format: int32 + mdata_sig: ~ + outputs: + port0: + index: 0 + item_width: 32 + nipc: 2 + context_fifo_depth: 1 + payload_fifo_depth: 1 + format: int32 + mdata_sig: ~ + port1: + index: 1 + item_width: 32 + nipc: 2 + context_fifo_depth: 1 + payload_fifo_depth: 1 + format: int32 + mdata_sig: ~ + +io_port: + +registers: + +properties: diff --git a/host/include/uhd/erfnoc/blocks/null_src_sink.yml b/host/include/uhd/erfnoc/blocks/null_src_sink.yml new file mode 100644 index 000000000..1636ea046 --- /dev/null +++ b/host/include/uhd/erfnoc/blocks/null_src_sink.yml @@ -0,0 +1,68 @@ +schema: rfnoc_modtool_args +module_name: null_src_sink +version: 1.0 +rfnoc_version: 1.0 +chdr_width: 64 +noc_id: 0x1 + +clocks: + - name: rfnoc_chdr + freq: "[]" + - name: rfnoc_ctrl + freq: "[]" + +control: + sw_iface: nocscript + fpga_iface: ctrlport + interface_direction: master_slave + fifo_depth: 32 + clk_domain: rfnoc_ctrl + ctrlport: + byte_mode: True + timed: False + has_status: False + +data: + fpga_iface: axis_chdr + clk_domain: rfnoc_chdr + mtu: 1024 + inputs: + sink: + index: 0 + item_width: 32 + nipc: 2 + context_fifo_depth: 1 + payload_fifo_depth: 1 + format: int32 + mdata_sig: ~ + loop: + index: 1 + item_width: 32 + nipc: 2 + context_fifo_depth: 1 + payload_fifo_depth: 1 + format: int32 + mdata_sig: ~ + outputs: + source: + index: 0 + item_width: 32 + nipc: 2 + context_fifo_depth: 1 + payload_fifo_depth: 1 + format: int32 + mdata_sig: ~ + loop: + index: 1 + item_width: 32 + nipc: 2 + context_fifo_depth: 1 + payload_fifo_depth: 1 + format: int32 + mdata_sig: ~ + +io_port: + +registers: + +properties: diff --git a/host/include/uhd/erfnoc/blocks/radio_1x64.yml b/host/include/uhd/erfnoc/blocks/radio_1x64.yml new file mode 100644 index 000000000..0ee68ec24 --- /dev/null +++ b/host/include/uhd/erfnoc/blocks/radio_1x64.yml @@ -0,0 +1,72 @@ +schema: rfnoc_modtool_args +module_name: radio +version: 1.0 +rfnoc_version: 1.0 +chdr_width: 64 +noc_id: 0x12AD1000 + +clocks: + - name: rfnoc_chdr + freq: "[]" + - name: rfnoc_ctrl + freq: "[]" + - name: radio + freq: "[]" + +control: + sw_iface: nocscript + fpga_iface: ctrlport + interface_direction: master_slave + fifo_depth: 32 + clk_domain: rfnoc_ctrl + ctrlport: + byte_mode: True + timed: False + has_status: False + +# The parameters section lists parameters that get added to the generated +# Verilog for the module instantiation. Any parameter listed here may be set to +# different value in the image builder YAML file. +parameters: + NUM_PORTS: 1 + +data: + fpga_iface: axis_chdr + clk_domain: radio + mtu: 1024 + inputs: + port0: + index: 0 + item_width: 32 + nipc: 2 + context_fifo_depth: 1 + payload_fifo_depth: 1 + format: int32 + mdata_sig: ~ + outputs: + port0: + index: 0 + item_width: 32 + nipc: 2 + context_fifo_depth: 1 + payload_fifo_depth: 1 + format: int32 + mdata_sig: ~ + +io_ports: + ctrl_port: + type: ctrl_port + drive: master + rename: + pattern: (.*) + repl: m_\1 + time_keeper: + type: time_keeper + drive: listener + x300_radio: + type: x300_radio + drive: slave + +registers: + +properties: diff --git a/host/include/uhd/erfnoc/blocks/radio_2x64.yml b/host/include/uhd/erfnoc/blocks/radio_2x64.yml new file mode 100644 index 000000000..4e7838392 --- /dev/null +++ b/host/include/uhd/erfnoc/blocks/radio_2x64.yml @@ -0,0 +1,88 @@ +schema: rfnoc_modtool_args +module_name: radio +version: 1.0 +rfnoc_version: 1.0 +chdr_width: 64 +noc_id: 0x12AD1000 + +clocks: + - name: rfnoc_chdr + freq: "[]" + - name: rfnoc_ctrl + freq: "[]" + - name: radio + freq: "[]" + +control: + sw_iface: nocscript + fpga_iface: ctrlport + interface_direction: master_slave + fifo_depth: 32 + clk_domain: rfnoc_ctrl + ctrlport: + byte_mode: True + timed: False + has_status: False + +# The parameters section lists parameters that get added to the generated +# Verilog for the module instantiation. Any parameter listed here may be set to +# different value in the image builder YAML file. +parameters: + NUM_PORTS: 2 + +data: + fpga_iface: axis_chdr + clk_domain: rfnoc_chdr + mtu: 1024 + inputs: + port0: + index: 0 + item_width: 32 + nipc: 2 + context_fifo_depth: 1 + payload_fifo_depth: 1 + format: int32 + mdata_sig: ~ + port1: + index: 1 + item_width: 32 + nipc: 2 + context_fifo_depth: 1 + payload_fifo_depth: 1 + format: int32 + mdata_sig: ~ + outputs: + port0: + index: 0 + item_width: 32 + nipc: 2 + context_fifo_depth: 1 + payload_fifo_depth: 1 + format: int32 + mdata_sig: ~ + port1: + index: 1 + item_width: 32 + nipc: 2 + context_fifo_depth: 1 + payload_fifo_depth: 1 + format: int32 + mdata_sig: ~ + +io_ports: + ctrl_port: + type: ctrl_port + drive: master + rename: + pattern: (.*) + repl: m_\1 + time_keeper: + type: time_keeper + drive: listener + x300_radio: + type: x300_radio + drive: slave + +registers: + +properties: diff --git a/host/include/uhd/erfnoc/core/CMakeLists.txt b/host/include/uhd/erfnoc/core/CMakeLists.txt new file mode 100644 index 000000000..ef7904789 --- /dev/null +++ b/host/include/uhd/erfnoc/core/CMakeLists.txt @@ -0,0 +1,20 @@ +# +# Copyright 2019 Ettus Research, a National Instruments Company +# +# SPDX-License-Identifier: GPL-3.0-or-later +# + +file(GLOB yml_files "*.yml") +file(GLOB json_files "*.json") + +# We always need this, even when RFNoC is 'disabled' +UHD_INSTALL( + FILES ${yml_files} + DESTINATION ${PKG_DATA_DIR}/erfnoc/core + COMPONENT headers # TODO: Different component +) +UHD_INSTALL( + FILES ${json_files} + DESTINATION ${PKG_DATA_DIR}/erfnoc/core + COMPONENT headers # TODO: Different component +)
\ No newline at end of file diff --git a/host/include/uhd/erfnoc/core/io_signatures.yml b/host/include/uhd/erfnoc/core/io_signatures.yml new file mode 100644 index 000000000..cb2ca2cbc --- /dev/null +++ b/host/include/uhd/erfnoc/core/io_signatures.yml @@ -0,0 +1,57 @@ +ctrl_port: + type: master-slave + ports: + - name: ctrlport_req_wr + type: from-master + - name: ctrlport_req_rd + type: from-master + - name: ctrlport_req_addr + type: from-master + width: 20 + - name: ctrlport_req_data + type: from-master + width: 32 + - name: ctrlport_req_byte_en + type: from-master + width: 4 + - name: ctrlport_req_has_time + type: from-master + - name: ctrlport_req_time + type: from-master + width: 64 + - name: ctrlport_resp_ack + type: to-master + - name: ctrlport_resp_status + type: to-master + width: 2 + - name: ctrlport_resp_data + type: to-master + width: 32 + +time_keeper: + type: broadcaster-listener + ports: + - name: radio_time + width: 64 + +x300_radio: + type: master-slave + ports: + - name: radio_rx_data + type: from-master + width: 64 + - name: radio_rx_stb + type: from-master + width: 2 + - name: radio_rx_running + type: to-master + width: 2 + - name: radio_tx_data + type: to-master + width: 64 + - name: radio_tx_stb + type: from-master + width: 2 + - name: radio_tx_running + type: to-master + width: 2 diff --git a/host/include/uhd/erfnoc/core/rfnoc_imagebuilder_args.json b/host/include/uhd/erfnoc/core/rfnoc_imagebuilder_args.json new file mode 100644 index 000000000..65ef2dd76 --- /dev/null +++ b/host/include/uhd/erfnoc/core/rfnoc_imagebuilder_args.json @@ -0,0 +1,78 @@ +{ + "type": "object", + "properties": { + "schema": { "const": "rfnoc_imagebuilder_args" }, + "copyright": { "type": "string" }, + "version": { "type": "number" }, + "license": { "type": "string" }, + "device_desc": { "type": "string" }, + "rfnoc_version": { "type": "number" }, + "chdr_width": { "enum": [64, 256] }, + + "stream_endpoints": { "$ref": "#/definitions/stream_endpoints" }, + "noc_blocks": { "$ref": "#/definitions/noc_blocks" }, + "clk_domains": { "type": "array", + "items": { "$ref": "#/definitions/connection" } }, + "connections": { "type": "array", + "items": { "$ref": "#/definitions/connection" } } + }, + "required": ["schema", + "chdr_width", + "noc_blocks"], + "additionalProperties": false, + + "definitions": { + + "stream_endpoints": { + "type": "object", + "patternProperties": { + ".*": { "$ref": "#/definitions/stream_endpoint" } + } + }, + + "noc_blocks": { + "type": "object", + "patternProperties": { + ".*": { "$ref": "#/definitions/noc_block" } + } + }, + + "stream_endpoint": { + "type": "object", + "properties": { + "ctrl": { "type": "boolean" }, + "data": { "type": "boolean" }, + "num_data_i":{ "type": "integer", "minimum": 1 }, + "num_data_o":{ "type": "integer", "minimum": 1 }, + "buff_size": { "type": "integer", "minimum": 0 } + }, + "additionalProperties": false + }, + + "noc_block": { + "type": "object", + "properties": { + "block_desc": { "type": "string", "pattern": "^.*\\.yml" }, + "parameters": { "$ref": "#/definitions/parameter" } + }, + "required": ["block_desc"], + "additionalProperties": false + }, + + "parameter": { + "type": "object" + }, + + "connection": { + "type": "object", + "properties": { + "srcblk": { "type": "string", "minLength": 1 }, + "srcport": { "type": "string", "minLength": 1 }, + "dstblk": { "type": "string", "minLength": 1 }, + "dstport": { "type": "string", "minLength": 1 } + }, + "required": ["srcblk", "srcport", "dstblk", "dstport"], + "additionalProperties": false + } + } +} diff --git a/host/include/uhd/erfnoc/core/x310_bsp.yml b/host/include/uhd/erfnoc/core/x310_bsp.yml new file mode 100644 index 000000000..497927a08 --- /dev/null +++ b/host/include/uhd/erfnoc/core/x310_bsp.yml @@ -0,0 +1,45 @@ +type: x300 +type_id: DEAD +family: 7SERIES +transports: +- name: eth0 + type: 10G + width: 64 +- name: eth1 + type: 1G + width: 64 +- name: pcie + type: PCIe + width: 64 + +clocks: +- name: radio + +io_ports: + ctrlport_radio0: + type: ctrl_port + drive: slave + rename: + pattern: (ctrlport_)(.*) + repl: m_\1radio0_\2 + ctrlport_radio1: + type: ctrl_port + drive: slave + rename: + pattern: (ctrlport_)(.*) + repl: m_\1radio1_\2 + time_keeper: + type: time_keeper + drive: broadcaster + x300_radio0: + type: x300_radio + drive: master + rename: + pattern: (.*) + repl: \1_radio0 + x300_radio1: + type: x300_radio + drive: master + rename: + pattern: (.*) + repl: \1_radio1 |