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Diffstat (limited to 'fpga/usrp3/top/n3xx/dts/dma-common.dtsi')
-rw-r--r--fpga/usrp3/top/n3xx/dts/dma-common.dtsi588
1 files changed, 588 insertions, 0 deletions
diff --git a/fpga/usrp3/top/n3xx/dts/dma-common.dtsi b/fpga/usrp3/top/n3xx/dts/dma-common.dtsi
new file mode 100644
index 000000000..65d33cb76
--- /dev/null
+++ b/fpga/usrp3/top/n3xx/dts/dma-common.dtsi
@@ -0,0 +1,588 @@
+/*
+ * Copyright (c) 2017 National Instruments Corp
+ *
+ * SPDX-License-Identifier: GPL-2.0 OR X11
+ */
+
+&fpga_full {
+ tx_dma0: dma@43CA0000 {
+ compatible = "adi,axi-dmac-1.00.a";
+ reg = <0x43CA0000 0x10000>;
+ interrupts = <0 53 4>;
+ interrupt-parent = <&intc>;
+ clocks = <&clkc 15>;
+ #dma-cells = <1>;
+ adi,channels {
+ #size-cells = <0>;
+ #address-cells = <1>;
+ dma-channel@0 {
+ reg = <0>;
+ adi,source-bus-type = <0>;
+ adi,source-bus-width = <0x20>;
+ adi,destination-bus-type = <1>;
+ adi,destination-bus-width = <0x20>;
+ adi,length-width = <24>;
+ };
+ };
+ };
+ tx_dma1: dma@43CB0000 {
+ compatible = "adi,axi-dmac-1.00.a";
+ reg = <0x43CB0000 0x10000>;
+ interrupts = <0 53 4>;
+ interrupt-parent = <&intc>;
+ clocks = <&clkc 15>;
+ #dma-cells = <1>;
+ adi,channels {
+ #size-cells = <0>;
+ #address-cells = <1>;
+ dma-channel@0 {
+ reg = <0>;
+ adi,source-bus-type = <0>;
+ adi,source-bus-width = <0x20>;
+ adi,destination-bus-type = <1>;
+ adi,destination-bus-width = <0x20>;
+ adi,length-width = <24>;
+ };
+ };
+ };
+ tx_dma2: dma@43CC0000 {
+ compatible = "adi,axi-dmac-1.00.a";
+ reg = <0x43CC0000 0x10000>;
+ interrupts = <0 53 4>;
+ interrupt-parent = <&intc>;
+ clocks = <&clkc 15>;
+ #dma-cells = <1>;
+ adi,channels {
+ #size-cells = <0>;
+ #address-cells = <1>;
+ dma-channel@0 {
+ reg = <0>;
+ adi,source-bus-type = <0>;
+ adi,source-bus-width = <0x20>;
+ adi,destination-bus-type = <1>;
+ adi,destination-bus-width = <0x20>;
+ adi,length-width = <24>;
+ };
+ };
+ };
+ tx_dma3: dma@43CD0000 {
+ compatible = "adi,axi-dmac-1.00.a";
+ reg = <0x43CD0000 0x10000>;
+ interrupts = <0 53 4>;
+ interrupt-parent = <&intc>;
+ clocks = <&clkc 15>;
+ #dma-cells = <1>;
+ adi,channels {
+ #size-cells = <0>;
+ #address-cells = <1>;
+ dma-channel@0 {
+ reg = <0>;
+ adi,source-bus-type = <0>;
+ adi,source-bus-width = <0x20>;
+ adi,destination-bus-type = <1>;
+ adi,destination-bus-width = <0x20>;
+ adi,length-width = <24>;
+ };
+ };
+ };
+ tx_dma4: dma@43CE0000 {
+ compatible = "adi,axi-dmac-1.00.a";
+ reg = <0x43CE0000 0x10000>;
+ interrupts = <0 53 4>;
+ interrupt-parent = <&intc>;
+ clocks = <&clkc 15>;
+ #dma-cells = <1>;
+ adi,channels {
+ #size-cells = <0>;
+ #address-cells = <1>;
+ dma-channel@0 {
+ reg = <0>;
+ adi,source-bus-type = <0>;
+ adi,source-bus-width = <0x20>;
+ adi,destination-bus-type = <1>;
+ adi,destination-bus-width = <0x20>;
+ adi,length-width = <24>;
+ };
+ };
+ };
+ tx_dma5: dma@43CF0000 {
+ compatible = "adi,axi-dmac-1.00.a";
+ reg = <0x43CF0000 0x10000>;
+ interrupts = <0 53 4>;
+ interrupt-parent = <&intc>;
+ clocks = <&clkc 15>;
+ #dma-cells = <1>;
+ adi,channels {
+ #size-cells = <0>;
+ #address-cells = <1>;
+ dma-channel@0 {
+ reg = <0>;
+ adi,source-bus-type = <0>;
+ adi,source-bus-width = <0x20>;
+ adi,destination-bus-type = <1>;
+ adi,destination-bus-width = <0x20>;
+ adi,length-width = <24>;
+ };
+ };
+ };
+ tx_dma6: dma@43D00000 {
+ compatible = "adi,axi-dmac-1.00.a";
+ reg = <0x43D00000 0x10000>;
+ interrupts = <0 53 4>;
+ interrupt-parent = <&intc>;
+ clocks = <&clkc 15>;
+ #dma-cells = <1>;
+ adi,channels {
+ #size-cells = <0>;
+ #address-cells = <1>;
+ dma-channel@0 {
+ reg = <0>;
+ adi,source-bus-type = <0>;
+ adi,source-bus-width = <0x20>;
+ adi,destination-bus-type = <1>;
+ adi,destination-bus-width = <0x20>;
+ adi,length-width = <24>;
+ };
+ };
+ };
+ tx_dma7: dma@43D10000 {
+ compatible = "adi,axi-dmac-1.00.a";
+ reg = <0x43D10000 0x10000>;
+ interrupts = <0 53 4>;
+ interrupt-parent = <&intc>;
+ clocks = <&clkc 15>;
+ #dma-cells = <1>;
+ adi,channels {
+ #size-cells = <0>;
+ #address-cells = <1>;
+ dma-channel@0 {
+ reg = <0>;
+ adi,source-bus-type = <0>;
+ adi,source-bus-width = <0x20>;
+ adi,destination-bus-type = <1>;
+ adi,destination-bus-width = <0x20>;
+ adi,length-width = <24>;
+ };
+ };
+ };
+ tx_dma8: dma@43D20000 {
+ compatible = "adi,axi-dmac-1.00.a";
+ reg = <0x43D20000 0x10000>;
+ interrupts = <0 53 4>;
+ interrupt-parent = <&intc>;
+ clocks = <&clkc 15>;
+ #dma-cells = <1>;
+ adi,channels {
+ #size-cells = <0>;
+ #address-cells = <1>;
+ dma-channel@0 {
+ reg = <0>;
+ adi,source-bus-type = <0>;
+ adi,source-bus-width = <0x20>;
+ adi,destination-bus-type = <1>;
+ adi,destination-bus-width = <0x20>;
+ adi,length-width = <24>;
+ };
+ };
+ };
+ tx_dma9: dma@43D30000 {
+ compatible = "adi,axi-dmac-1.00.a";
+ reg = <0x43D30000 0x10000>;
+ interrupts = <0 53 4>;
+ interrupt-parent = <&intc>;
+ clocks = <&clkc 15>;
+ #dma-cells = <1>;
+ adi,channels {
+ #size-cells = <0>;
+ #address-cells = <1>;
+ dma-channel@0 {
+ reg = <0>;
+ adi,source-bus-type = <0>;
+ adi,source-bus-width = <0x20>;
+ adi,destination-bus-type = <1>;
+ adi,destination-bus-width = <0x20>;
+ adi,length-width = <24>;
+ };
+ };
+ };
+ rx_dma0: dma@43C00000 {
+ compatible = "adi,axi-dmac-1.00.a";
+ reg = <0x43C00000 0x10000>;
+ interrupts = <0 52 4>;
+ interrupt-parent = <&intc>;
+ clocks = <&clkc 15>;
+ #dma-cells = <1>;
+ adi,channels {
+ #size-cells = <0>;
+ #address-cells = <1>;
+ dma-channel@0 {
+ reg = <0>;
+ adi,source-bus-type = <1>;
+ adi,source-bus-width = <0x20>;
+ adi,destination-bus-type = <0>;
+ adi,destination-bus-width = <0x20>;
+ adi,length-width = <24>;
+ };
+ };
+ };
+ rx_dma1: dma@43C10000 {
+ compatible = "adi,axi-dmac-1.00.a";
+ reg = <0x43C10000 0x10000>;
+ interrupts = <0 52 4>;
+ interrupt-parent = <&intc>;
+ clocks = <&clkc 15>;
+ #dma-cells = <1>;
+ adi,channels {
+ #size-cells = <0>;
+ #address-cells = <1>;
+ dma-channel@0 {
+ reg = <0>;
+ adi,source-bus-type = <1>;
+ adi,source-bus-width = <0x20>;
+ adi,destination-bus-type = <0>;
+ adi,destination-bus-width = <0x20>;
+ adi,length-width = <24>;
+ };
+ };
+ };
+ rx_dma2: dma@43C20000 {
+ compatible = "adi,axi-dmac-1.00.a";
+ reg = <0x43C20000 0x10000>;
+ interrupts = <0 52 4>;
+ interrupt-parent = <&intc>;
+ clocks = <&clkc 15>;
+ #dma-cells = <1>;
+ adi,channels {
+ #size-cells = <0>;
+ #address-cells = <1>;
+ dma-channel@0 {
+ reg = <0>;
+ adi,source-bus-type = <1>;
+ adi,source-bus-width = <0x20>;
+ adi,destination-bus-type = <0>;
+ adi,destination-bus-width = <0x20>;
+ adi,length-width = <24>;
+ };
+ };
+ };
+ rx_dma3: dma@43C30000 {
+ compatible = "adi,axi-dmac-1.00.a";
+ reg = <0x43C30000 0x10000>;
+ interrupts = <0 52 4>;
+ interrupt-parent = <&intc>;
+ clocks = <&clkc 15>;
+ #dma-cells = <1>;
+ adi,channels {
+ #size-cells = <0>;
+ #address-cells = <1>;
+ dma-channel@0 {
+ reg = <0>;
+ adi,source-bus-type = <1>;
+ adi,source-bus-width = <0x20>;
+ adi,destination-bus-type = <0>;
+ adi,destination-bus-width = <0x20>;
+ adi,length-width = <24>;
+ };
+ };
+ };
+ rx_dma4: dma@43C40000 {
+ compatible = "adi,axi-dmac-1.00.a";
+ reg = <0x43C40000 0x10000>;
+ interrupts = <0 52 4>;
+ interrupt-parent = <&intc>;
+ clocks = <&clkc 15>;
+ #dma-cells = <1>;
+ adi,channels {
+ #size-cells = <0>;
+ #address-cells = <1>;
+ dma-channel@0 {
+ reg = <0>;
+ adi,source-bus-type = <1>;
+ adi,source-bus-width = <0x20>;
+ adi,destination-bus-type = <0>;
+ adi,destination-bus-width = <0x20>;
+ adi,length-width = <24>;
+ };
+ };
+ };
+ rx_dma5: dma@43C50000 {
+ compatible = "adi,axi-dmac-1.00.a";
+ reg = <0x43C50000 0x10000>;
+ interrupts = <0 52 4>;
+ interrupt-parent = <&intc>;
+ clocks = <&clkc 15>;
+ #dma-cells = <1>;
+ adi,channels {
+ #size-cells = <0>;
+ #address-cells = <1>;
+ dma-channel@0 {
+ reg = <0>;
+ adi,source-bus-type = <1>;
+ adi,source-bus-width = <0x20>;
+ adi,destination-bus-type = <0>;
+ adi,destination-bus-width = <0x20>;
+ adi,length-width = <24>;
+ };
+ };
+ };
+ rx_dma6: dma@43C60000 {
+ compatible = "adi,axi-dmac-1.00.a";
+ reg = <0x43C60000 0x10000>;
+ interrupts = <0 52 4>;
+ interrupt-parent = <&intc>;
+ clocks = <&clkc 15>;
+ #dma-cells = <1>;
+ adi,channels {
+ #size-cells = <0>;
+ #address-cells = <1>;
+ dma-channel@0 {
+ reg = <0>;
+ adi,source-bus-type = <1>;
+ adi,source-bus-width = <0x20>;
+ adi,destination-bus-type = <0>;
+ adi,destination-bus-width = <0x20>;
+ adi,length-width = <24>;
+ };
+ };
+ };
+ rx_dma7: dma@43C70000 {
+ compatible = "adi,axi-dmac-1.00.a";
+ reg = <0x43C70000 0x10000>;
+ interrupts = <0 52 4>;
+ interrupt-parent = <&intc>;
+ clocks = <&clkc 15>;
+ #dma-cells = <1>;
+ adi,channels {
+ #size-cells = <0>;
+ #address-cells = <1>;
+ dma-channel@0 {
+ reg = <0>;
+ adi,source-bus-type = <1>;
+ adi,source-bus-width = <0x20>;
+ adi,destination-bus-type = <0>;
+ adi,destination-bus-width = <0x20>;
+ adi,length-width = <24>;
+ };
+ };
+ };
+ rx_dma8: dma@43C80000 {
+ compatible = "adi,axi-dmac-1.00.a";
+ reg = <0x43C80000 0x10000>;
+ interrupts = <0 52 4>;
+ interrupt-parent = <&intc>;
+ clocks = <&clkc 15>;
+ #dma-cells = <1>;
+ adi,channels {
+ #size-cells = <0>;
+ #address-cells = <1>;
+ dma-channel@0 {
+ reg = <0>;
+ adi,source-bus-type = <1>;
+ adi,source-bus-width = <0x20>;
+ adi,destination-bus-type = <0>;
+ adi,destination-bus-width = <0x20>;
+ adi,length-width = <24>;
+ };
+ };
+ };
+ rx_dma9: dma@43C90000 {
+ compatible = "adi,axi-dmac-1.00.a";
+ reg = <0x43C90000 0x10000>;
+ interrupts = <0 52 4>;
+ interrupt-parent = <&intc>;
+ clocks = <&clkc 15>;
+ #dma-cells = <1>;
+ adi,channels {
+ #size-cells = <0>;
+ #address-cells = <1>;
+ dma-channel@0 {
+ reg = <0>;
+ adi,source-bus-type = <1>;
+ adi,source-bus-width = <0x20>;
+ adi,destination-bus-type = <0>;
+ adi,destination-bus-width = <0x20>;
+ adi,length-width = <24>;
+ };
+ };
+ };
+
+
+ usrp_rx_dma0: usrp-rx-dma@43c00000 {
+ compatible = "ettus,usrp-rx-dma";
+ dmas = <&rx_dma0 0>;
+ dma-names = "dma";
+ port-id = <0>;
+ status = "okay";
+
+ regmap = <&dma_conf0>;
+ offset = <0x0>;
+ };
+
+ usrp_rx_dma1: usrp-rx-dma@43c10000 {
+ compatible = "ettus,usrp-rx-dma";
+ dmas = <&rx_dma1 0>;
+ dma-names = "dma";
+ port-id = <1>;
+
+ regmap = <&dma_conf0>;
+ offset = <0x4>;
+ };
+
+ usrp_rx_dma2: usrp-rx-dma@43c20000 {
+ compatible = "ettus,usrp-rx-dma";
+ dmas = <&rx_dma2 0>;
+ dma-names = "dma";
+ port-id = <2>;
+
+ regmap = <&dma_conf0>;
+ offset = <0x8>;
+ };
+
+ usrp_rx_dma3: usrp-rx-dma@43c30000 {
+ compatible = "ettus,usrp-rx-dma";
+ dmas = <&rx_dma3 0>;
+ dma-names = "dma";
+ port-id = <3>;
+
+ regmap = <&dma_conf0>;
+ offset = <0xc>;
+ };
+
+ usrp_rx_dma4: usrp-rx-dma@43c40000 {
+ compatible = "ettus,usrp-rx-dma";
+ dmas = <&rx_dma4 0>;
+ dma-names = "dma";
+ port-id = <4>;
+
+ regmap = <&dma_conf0>;
+ offset = <0x10>;
+ };
+
+ usrp_rx_dma5: usrp-rx-dma@43c50000 {
+ compatible = "ettus,usrp-rx-dma";
+ dmas = <&rx_dma5 0>;
+ dma-names = "dma";
+ port-id = <5>;
+
+ regmap = <&dma_conf0>;
+ offset = <0x14>;
+ };
+
+ usrp_rx_dma6: usrp-rx-dma@43c60000 {
+ compatible = "ettus,usrp-rx-dma";
+ dmas = <&rx_dma6 0>;
+ dma-names = "dma";
+ port-id = <6>;
+
+ regmap = <&dma_conf0>;
+ offset = <0x18>;
+ };
+
+ usrp_rx_dma7: usrp-rx-dma@43c70000 {
+ compatible = "ettus,usrp-rx-dma";
+ dmas = <&rx_dma7 0>;
+ dma-names = "dma";
+ port-id = <7>;
+
+ regmap = <&dma_conf0>;
+ offset = <0x1c>;
+ };
+
+ usrp_rx_dma8: usrp-rx-dma@43c80000 {
+ compatible = "ettus,usrp-rx-dma";
+ dmas = <&rx_dma8 0>;
+ dma-names = "dma";
+ port-id = <8>;
+
+ regmap = <&dma_conf0>;
+ offset = <0x20>;
+ };
+
+ usrp_rx_dma9: usrp-rx-dma@43c90000 {
+ compatible = "ettus,usrp-rx-dma";
+ dmas = <&rx_dma9 0>;
+ dma-names = "dma";
+ port-id = <9>;
+
+ regmap = <&dma_conf0>;
+ offset = <0x24>;
+ };
+
+ usrp_tx_dma0: usrp-tx-dma@43ca0000 {
+ compatible = "ettus,usrp-tx-dma";
+ dmas = <&tx_dma0 0>;
+ dma-names = "dma";
+ port-id = <0>;
+ };
+
+ usrp_tx_dma1: usrp-tx-dma@43cb0000 {
+ compatible = "ettus,usrp-tx-dma";
+ dmas = <&tx_dma1 0>;
+ dma-names = "dma";
+ port-id = <1>;
+ };
+
+ usrp_tx_dma2: usrp-tx-dma@43cc0000 {
+ compatible = "ettus,usrp-tx-dma";
+ dmas = <&tx_dma2 0>;
+ dma-names = "dma";
+ port-id = <2>;
+ status = "okay";
+ };
+
+ usrp_tx_dma3: usrp-tx-dma@43cd0000 {
+ compatible = "ettus,usrp-tx-dma";
+ dmas = <&tx_dma3 0>;
+ dma-names = "dma";
+ port-id = <3>;
+ };
+
+ usrp_tx_dma4: usrp-tx-dma@43ce0000 {
+ compatible = "ettus,usrp-tx-dma";
+ dmas = <&tx_dma4 0>;
+ dma-names = "dma";
+ port-id = <4>;
+ status = "okay";
+ };
+
+ usrp_tx_dma5: usrp-tx-dma@43cf0000 {
+ compatible = "ettus,usrp-tx-dma";
+ dmas = <&tx_dma5 0>;
+ dma-names = "dma";
+ port-id = <5>;
+ };
+
+ usrp_tx_dma6: usrp-tx-dma@43d00000 {
+ compatible = "ettus,usrp-tx-dma";
+ dmas = <&tx_dma6 0>;
+ dma-names = "dma";
+ port-id = <6>;
+ };
+
+ usrp_tx_dma7: usrp-tx-dma@43d10000 {
+ compatible = "ettus,usrp-tx-dma";
+ dmas = <&tx_dma7 0>;
+ dma-names = "dma";
+ port-id = <7>;
+ };
+
+ usrp_tx_dma8: usrp-tx-dma@43d20000 {
+ compatible = "ettus,usrp-tx-dma";
+ dmas = <&tx_dma8 0>;
+ dma-names = "dma";
+ port-id = <8>;
+ };
+
+ usrp_tx_dma9: usrp-tx-dma@43d30000 {
+ compatible = "ettus,usrp-tx-dma";
+ dmas = <&tx_dma9 0>;
+ dma-names = "dma";
+ port-id = <9>;
+ };
+
+ dma_conf0: dma_conf0@42080000 {
+ compatible = "syscon";
+ reg = <0x42080000 0x1000>;
+ status = "okay";
+ };
+};
generated by cgit v1.2.3 (git 2.46.0) at 2026-01-09 05:14:01 +0000