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| author | Josh Blum <josh@joshknows.com> | 2010-08-10 23:29:22 -0700 |
|---|---|---|
| committer | Josh Blum <josh@joshknows.com> | 2010-08-10 23:29:22 -0700 |
| commit | 293ccdccd1e111942e9cc48ab87690da5202e406 (patch) | |
| tree | 4e861ca41fabc1e2664b7d0807242ab9c61544fd /host/lib/usrp/usrp2/usrp2_regs.hpp | |
| parent | 1301d665d621358ec6eccb41a020a4689cb0b566 (diff) | |
| parent | 9e419c7b7f35062ceb2ed4e508cadb163067593f (diff) | |
| download | uhd-293ccdccd1e111942e9cc48ab87690da5202e406.tar.gz uhd-293ccdccd1e111942e9cc48ab87690da5202e406.tar.bz2 uhd-293ccdccd1e111942e9cc48ab87690da5202e406.zip | |
usrp-e: merged master, does not build
Diffstat (limited to 'host/lib/usrp/usrp2/usrp2_regs.hpp')
| -rw-r--r-- | host/lib/usrp/usrp2/usrp2_regs.hpp | 15 |
1 files changed, 14 insertions, 1 deletions
diff --git a/host/lib/usrp/usrp2/usrp2_regs.hpp b/host/lib/usrp/usrp2/usrp2_regs.hpp index 1a5864c85..9d306090b 100644 --- a/host/lib/usrp/usrp2/usrp2_regs.hpp +++ b/host/lib/usrp/usrp2/usrp2_regs.hpp @@ -107,6 +107,7 @@ #define U2_REG_TIME64_SECS_RB (0xCC00 + 4*10) #define U2_REG_TIME64_TICKS_RB (0xCC00 + 4*11) +#define U2_REG_COMPAT_NUM_RB (0xCC00 + 4*12) //pps flags (see above) #define U2_FLAG_TIME64_PPS_NEGEDGE (0 << 0) @@ -226,7 +227,7 @@ #define U2_REG_ATR_FULL_RXSIDE U2_REG_ATR_BASE + 14 /////////////////////////////////////////////////// -// VITA RX CTRL regs +// RX CTRL regs /////////////////////////////////////////////////// // The following 3 are logically a single command register. // They are clocked into the underlying fifo when time_ticks is written. @@ -241,4 +242,16 @@ #define U2_REG_RX_CTRL_NSAMPS_PER_PKT _SR_ADDR(SR_RX_CTRL + 7) #define U2_REG_RX_CTRL_NCHANNELS _SR_ADDR(SR_RX_CTRL + 8) // 1 in basic case, up to 4 for vector sources +/////////////////////////////////////////////////// +// TX CTRL regs +/////////////////////////////////////////////////// +#define U2_REG_TX_CTRL_NUM_CHAN _SR_ADDR(SR_TX_CTRL + 0) +#define U2_REG_TX_CTRL_CLEAR_STATE _SR_ADDR(SR_TX_CTRL + 1) +#define U2_REG_TX_CTRL_REPORT_SID _SR_ADDR(SR_TX_CTRL + 2) +#define U2_REG_TX_CTRL_POLICY _SR_ADDR(SR_TX_CTRL + 3) + +#define U2_FLAG_TX_CTRL_POLICY_WAIT (0x1 << 0) +#define U2_FLAG_TX_CTRL_POLICY_NEXT_PACKET (0x1 << 1) +#define U2_FLAG_TX_CTRL_POLICY_NEXT_BURST (0x1 << 2) + #endif /* INCLUDED_USRP2_REGS_HPP */ |