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| author | Mark Meserve <mark.meserve@ni.com> | 2018-07-24 13:14:01 -0500 |
|---|---|---|
| committer | Martin Braun <martin.braun@ettus.com> | 2018-07-31 10:08:53 -0700 |
| commit | 0b9b763dd7d5647b769748cf470f5e741dcc556e (patch) | |
| tree | 4f510ff7b7dccaec688cc87686f65df788861e3c | |
| parent | b16cf34e47c345b3ca7317ab74735616f2e32994 (diff) | |
| download | uhd-0b9b763dd7d5647b769748cf470f5e741dcc556e.tar.gz uhd-0b9b763dd7d5647b769748cf470f5e741dcc556e.tar.bz2 uhd-0b9b763dd7d5647b769748cf470f5e741dcc556e.zip | |
lmx2592: always mux lock detect after init
| -rw-r--r-- | host/lib/usrp/common/lmx2592.cpp | 14 |
1 files changed, 5 insertions, 9 deletions
diff --git a/host/lib/usrp/common/lmx2592.cpp b/host/lib/usrp/common/lmx2592.cpp index dedc56626..9a31f0ec7 100644 --- a/host/lib/usrp/common/lmx2592.cpp +++ b/host/lib/usrp/common/lmx2592.cpp @@ -119,6 +119,10 @@ public: random_number % readback)); } + _regs.muxout_sel = lmx2592_regs_t::muxout_sel_t::MUXOUT_SEL_LOCK_DETECT; + UHD_LOG_TRACE("LMX2592", "Disabling SPI Readback"); + _write_fn(_regs.ADDR_R0, _regs.get_reg(_regs.ADDR_R0)); + // Set register values where driver defaults differ from the datasheet values _regs.acal_enable = 0; _regs.fcal_enable = 0; @@ -330,11 +334,7 @@ public: } bool get_lock_status() override { - // MUXOUT is shared between Lock Detect and SPI Readback - _regs.muxout_sel = lmx2592_regs_t::muxout_sel_t::MUXOUT_SEL_LOCK_DETECT; - commit(); - - // The SPI MISO is now being driven by lock detect + // SPI MISO is being driven by lock detect // If the PLL is locked we expect to read 0xFFFF from any read, else 0x0000 const auto value_read = _read_fn(_regs.ADDR_R0); const auto lock_status = (value_read == 0xFFFF); @@ -343,10 +343,6 @@ public: "LMX2592", str(boost::format("Read Lock status: 0x%04X") % static_cast<unsigned int>(value_read))); - // Restore ability to read registers - _regs.muxout_sel = lmx2592_regs_t::muxout_sel_t::MUXOUT_SEL_READBACK; - commit(); - return lock_status; } |